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专利名称：Dual-gate structure and method of
fabricating integrated circuits having dual-gate structures
发明人：Tuo-Hung Ho,Ming-Fang Wang,Chi-Chun
Chen,Chih-Wei Yang,Liang-Gi Yao,Chih-ChangChen
申请号：US10226617申请日：20020823
公开号：US20040038538A1公开日：20040226
专利附图：
摘要：A method of fabricating a dual-gate on a substrate and an integrated circuithaving a dual-gate structure are provided. A first high-K dielectric layer is formed in a firstarea defined for a first gate structure and in a second area defined for a second gatestructure. A second high-K dielectric layer is formed in the first and second areas. Thefirst high-K dielectric layer has a lower etch rate to an etchant relative to the secondhigh-K dielectric layer. The second high-K dielectric layer is etched from the second areato said first high-K dielectric layer with the etchant, and a gate conductive layer is formedin the first and second areas over the second high-K dielectric layer and first high-K
dielectric layer, respectively.
申请人：HO TUO-HUNG,WANG MING-FANG,CHEN CHI-CHUN,YANG CHIH-WEI,YAOLIANG-GI,CHEN CHIH-CHANG
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